標題: A low temperature polycrystalline silicon thin film transistor phase locked loop circuit used for clock regeneration
作者: Tai, Ya-Hsiang
Tseng, Chen-Yeh
顯示科技研究所
Institute of Display
公開日期: 2007
摘要: In this paper, a low temperature polycrystalline silicon (LTPS) thin film transistor (TFT) circuit of a phase locked loop (PLL) is proposed. Its performance is discussed and its high tolerance of device variation is demonstrated.
URI: http://hdl.handle.net/11536/9223
ISBN: 978-957-28522-4-8
期刊: IDMC'07: PROCEEDINGS OF THE INTERNATIONAL DISPLAY MANUFACTURING CONFERENCE 2007
起始頁: 509
結束頁: 511
顯示於類別:會議論文