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dc.contributor.author任建葳en_US
dc.date.accessioned2014-12-13T10:35:20Z-
dc.date.available2014-12-13T10:35:20Z-
dc.date.issued2002en_US
dc.identifier.govdocNSC91-2218-E009-011zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/93350-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=786011&docId=151182en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title用於軟體無線電基頻處理之系統晶片設計技術---子計劃III:數位訊號處理器與可重置加速器之設計(I)zh_TW
dc.titleThe Design of DSP Processor Core and Configurable Accelerator(I)en_US
dc.typePlanen_US
dc.contributor.department交通大學電子工程研究所zh_TW
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