| 標題: | 用於軟體無線電基頻處理之系統晶片設計技術---子計劃III：數位訊號處理器與可重置加速器之設計(I) The Design of DSP Processor Core and Configurable Accelerator(I) |
| 作者: | 任建葳 交通大學電子工程研究所 |
| 公開日期: | 2002 |
| 官方說明文件#: | NSC91-2218-E009-011 |
| URI: | http://hdl.handle.net/11536/93350 https://www.grb.gov.tw/search/planDetail?id=786011&docId=151182 |
| Appears in Collections: | Research Plans |
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