低功率低電壓數位及類比積體電路之晶片實現及設計法則(VI)

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DC Field	Value	Language
dc.contributor.author	陳明哲	en_US
dc.contributor.author	CHEN MING-JER	en_US
dc.date.accessioned	2014-12-13T10:36:05Z	-
dc.date.available	2014-12-13T10:36:05Z	-
dc.date.issued	2000	en_US
dc.identifier.govdoc	NSC89-2215-E009-114	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/93765	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=583919&docId=109714	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	低功率低電壓數位及類比積體電路之晶片實現及設計法則(VI)	zh_TW
dc.title	Implementation and Methodology for Low Power/Low Voltage Digital and Analog Integrated Circuits(VI)	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系	zh_TW
Appears in Collections:	Research Plans

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