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dc.contributor.author陳正en_US
dc.contributor.authorCHEN CHENGen_US
dc.date.accessioned2014-12-13T10:38:36Z-
dc.date.available2014-12-13T10:38:36Z-
dc.date.issued1997en_US
dc.identifier.govdocNSC86-2213-E009-091zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/95533-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=272763&docId=48709en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject模擬評估環境zh_TW
dc.subject系統架構zh_TW
dc.subject平行編譯zh_TW
dc.subject平行作業系統zh_TW
dc.subject輸出入子系統zh_TW
dc.subject內接網路zh_TW
dc.subject多處理機zh_TW
dc.subject多重匯流排zh_TW
dc.subjectSimulation and evaluation environmenten_US
dc.subjectSystem architectureen_US
dc.subjectParallel compilationen_US
dc.subjectParallel operating systemen_US
dc.subjectI/O subsystemen_US
dc.subjectInterconnection networken_US
dc.subjectMultiprocessoren_US
dc.subjectHyberbusen_US
dc.title可延伸多處理機系統架構設計之研究-總計畫(II)zh_TW
dc.titleStudy of System Architecture Design for Scalable Mulitprocessors(II)en_US
dc.typePlanen_US
dc.contributor.department交通大學資訊工程研究所zh_TW
Appears in Collections:Research Plans