標題: Electrical measurement of local stress and lateral diffusion near Source/Drain extension corner of uniaxially stressed n-MOSFETs
作者: Hsieh, Chen-Yu
Chen, Ming-Jer
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: dopant diffusion;mechanical stress;MOSFET;piezoresistance;shallow-trench isolation (STI);strain;tunneling
公開日期: 1-三月-2008
摘要: -On a 1.27-nm gate oxide n-MOSFET that undergoes longitudinal stress via a layout technique, subthreshold current is measured as a function of the gate edge to shallow-trench isolation (STI) spacing and is transformed via bandgap shift into the source/drain extension corner stress. The extracted local stress is quantitatively comparable with those of the channel as created by the gate direct tunneling measurement in inversion, the mobility measurement, and the threshold voltage measurement. In addition, its dependencies on the gate edge to STI spacing confirm the validity of the layout technique in controlling the corner or channel stress. The gate edge direct tunneling (EDT) measurement in accumulation straightforwardly leads to the quantified gate-to-source/drain-extension overlap length. Particularly, a retarded diffusion length of 1.1 nm for a stress change of -320 MPa and the resulting strain-induced activation energy both are in satisfactory agreement with those of the process simulation. A physically oriented analytic model is, therefore, reached, expressing the lateral diffusion as a function of the corner stress.
URI: http://dx.doi.org/10.1109/TED.2007.915050
http://hdl.handle.net/11536/9605
ISSN: 0018-9383
DOI: 10.1109/TED.2007.915050
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 55
Issue: 3
起始頁: 844
結束頁: 849
顯示於類別:期刊論文


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