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dc.contributor.authorLo, Tien-Yuen_US
dc.contributor.authorHung, Chung-Chihen_US
dc.date.accessioned2014-12-08T15:12:37Z-
dc.date.available2014-12-08T15:12:37Z-
dc.date.issued2008-02-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2007.910747en_US
dc.identifier.urihttp://hdl.handle.net/11536/9693-
dc.description.abstractA configuration of a linearized operational transconductance amplifier (OTA) for low-voltage and high-frequency applications is proposed. By using double pseudodifferential pairs and the source-degeneration structure under nano-scale CMOS technology, the norlinearity caused by short channel effect from a small feature size can be minimized. A robust common-mode control system is designed for input and output common-mode stability and thus reduces distortion caused by common-mode voltage variation. Mining ability can be achieved by using MOS transistors in the linear region. The linearity of the OTA is about -60-dB third-order inter-modulation (IM3) distortion for up to 0.9 V-pp at 40 MHz. This OTA was fabricated by the TSMC 180-nm deep n-well CMOS process. It occupies a small area of 15.1 X 10(-3) mm(2) and the power consumption is 9.5 mW under a 1.5-V supply voltage.en_US
dc.language.isoen_USen_US
dc.subjectoperational transconductance amplifier (OTA)en_US
dc.subjectpseudodifferential structureen_US
dc.subjectshort channel effecten_US
dc.subjectsource degenerationen_US
dc.titleA 40-MHz double differential-pair CMOS OTA with-60-dB IM3en_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2007.910747en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume55en_US
dc.citation.issue1en_US
dc.citation.spage246en_US
dc.citation.epage253en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000254022300002-
dc.citation.woscount1-
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