完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 張俊彥 | en_US |
dc.contributor.author | CHANG CHUN-YEN | en_US |
dc.date.accessioned | 2014-12-13T10:40:39Z | - |
dc.date.available | 2014-12-13T10:40:39Z | - |
dc.date.issued | 2012 | en_US |
dc.identifier.govdoc | NSC101-2221-E009-174 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/97709 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2628041&docId=394247 | en_US |
dc.description.abstract | 本計畫第一年為開發P 型通道雙複晶矽薄膜電晶體非揮發性記憶體(P-channel Twin Poly-Si TFT Nonvolatile Memory),雙複晶矽薄膜電晶體為平面式記憶體,製程簡單具 低成本,並可在TFT 基礎上形成三維堆疊式(3D-stacked)結構,可具有高儲存密度且利 實現未來的主動式液晶顯示器(AMLCD)系統面板,極具產業應用價值。此外,P 型通道 記憶體的操作機制具有高電子注入效率、低功率消耗及可改善氧化層可靠度。另外我 們也結合超薄主動層(Ultra-thin Body, UTB)製作在TFT 基礎上,可讓次臨界擺幅 (subthreshold swing, SS)更進一步的降低,能更清楚判斷寫入及抹除狀態,閘極控 制能力更好而能使記憶體寫抹速度提高。最後我們搭配氨電漿與氟電漿的植入,來保 護複晶矽薄膜通道,來探討其對P 型通道元件以及超薄主動層元件之可靠度的效應, 尤其是在寫入/抹除次數(P/E cycles、或稱Endurance),與電荷保存時間(Retention time)上。 本計畫在第二年開發P 型通道雙複晶矽電晶體非揮發性記憶體在單晶上,運用於非 揮發性一次性寫入(One-Time Programmable, OTP)記憶體家族,且此製程與CMOS 是 完全相符容,搭配P 型通道以期將來可應用於低成本和低功率消耗之嵌入式記憶體 (embedded memory)與快閃記憶體(Flash memory) ,此外也將使用Oxide /Nitride (ON) 結構去取代穿隧氧化層,讓可靠度都能進一步的提升,而能更進一步的應用於多次寫 入性(Multi Time Programmable, MTP)記憶體中。故本計畫的提出是深具重要的研究 課題。 | zh_TW |
dc.description.abstract | In the first year, we develop p-channel twin poly-Si thin-film-transistor nonvolatile memory (TFT NVM). Twin TFT NVM is the planar memory. The process is simple and cost is low. The device can form the 3D-stacked structure that will increase the device density and fulfill the active matrix liquid crystal display (AMLCD) system panel application. In addition, p-channel memory using the band-to-band hot hole induced hot electron (BBHE) operation has the high electron injection efficiency, low power and better reliability of the tunnel oxide. Combing the ultra-thin active region could further lower the sub-threshold swing of the novel device. That helps distinguish the program/erase state and the UTB device has better gate-control which improve the program/erase speed. Finally, we use the NH3 and F plasma treatment to protect the poly-Si channel and study the reliability effect on the p-channel device and UTB device, particularly in the endurance and retention. In the second year, we develop twin transistor NVM on the single crystal process. The device is applied on the one time programmable memory device. In the meanwhile, combing the p-channel structure could form the low cost, low power embedded memory and flash memory. In addition, using the oxide/nitride structure which replaces the tunnel SiO2 could improve the reliability. The device could further be applied on the multi time programmable memory application. Hence, the proposed device is of importance in the NVM. | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 薄膜電晶體(Thin film transistor) | zh_TW |
dc.subject | 三維堆疊式(3D-stacked) | zh_TW |
dc.subject | 超薄主動層 (Ultra-thin Body) | zh_TW |
dc.subject | 一次性寫入(One Time Programmable) | zh_TW |
dc.subject | 嵌入式記憶體(embedded memory) | zh_TW |
dc.subject | Thin film transistor(TFT) | en_US |
dc.subject | 3D-stacked | en_US |
dc.subject | Ultra-thin Body (UTB) | en_US |
dc.subject | One time programmable(OTP) | en_US |
dc.subject | embedded memory | en_US |
dc.title | 新穎超薄主動層P型通道雙電晶體非揮發性記憶體 | zh_TW |
dc.title | Novel Ultra-Thin Body P-Channel Twin Poly-Si Nonvolatile Memory( I ) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
顯示於類別: | 研究計畫 |