Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 單智君 | en_US |
dc.contributor.author | JEAN JYH-JIUNSHANN | en_US |
dc.date.accessioned | 2014-12-13T10:40:48Z | - |
dc.date.available | 2014-12-13T10:40:48Z | - |
dc.date.issued | 2000 | en_US |
dc.identifier.govdoc | NSC89-2213-E009-066 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/97817 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=513255&docId=92972 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | x86指令集 | zh_TW |
dc.subject | 微處理機 | zh_TW |
dc.subject | 資料流架構 | zh_TW |
dc.subject | 超純量架構 | zh_TW |
dc.subject | 資料流圖 | zh_TW |
dc.subject | 高頻寬資料存取 | zh_TW |
dc.subject | x86 Instruction set | en_US |
dc.subject | Microprocessor | en_US |
dc.subject | Data flow | en_US |
dc.subject | Superscalar | en_US |
dc.subject | Data flow graph | en_US |
dc.subject | High bandwidth data access | en_US |
dc.title | 具資料流引擎之x86微處理機設計 | zh_TW |
dc.title | Design an x86 Microprocessor with Data-Flow Engine | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 交通大學資訊工程系 | zh_TW |
Appears in Collections: | Research Plans |
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