下世代行動通訊之通道編解碼晶片設計

Abstract

在行動通訊系統裡，高運算量的通道編解碼模組往往扮演相當關鍵的角色，不僅要達到傳 輸需求的高吞吐量，也必須降低伴隨而來的功率消耗，以提供具有技術競爭力的解決方案。 近年來，渦輪碼（Turbo codes）與低密度奇偶校驗碼（Low-Density Parity-Check codes，簡 稱LDPC codes）因為解碼效能優異，兩者皆被廣泛使用於各種通訊規格裡；但由於低密度 奇偶校驗碼難以提供彈性編碼率與可變碼字長度，第三代手機通訊標準在release-8（又稱為 3GPP-LTE）版本後已選擇渦輪碼作為通道編碼的唯一選擇。而為滿足現代人使用手持行動 裝置的高網路傳輸速度要求，近期持續制定release-9、release-10（又稱為LTE-Advanced） 更進一步將下行（Downlink）峰值速率提升到100Mbps~1Gbps，渦輪碼要同時達到1Gbps 吞吐量並降低功率消耗，仍是重大挑戰。 據此，本計劃除進行渦輪碼的高速低功耗晶片設計，也將從低密度奇偶校驗迴旋碼 （Low-Density Parity-Check Convolutional codes，簡稱LDPC-CC）著手，融合低密度奇偶校 驗碼的優異解碼效能以及迴旋碼的彈性編碼長度等優點，改善其高解碼延遲、低平行度、 偏低解碼速率等缺點，以設計出超越1Gbps 吞吐量、功率消耗小於0.2 瓦特，適用在下世代 行動通訊系統的通道編解碼器，並期許相關研究成果能得到ISSCC 與JSSC 等論文肯定。

The channel coding module with high computation load plays an important role in wireless communication system. The competitive design must not only meet the system requirements in high throughput but also improve the energy efficiency. In the past decade, Turbo codes and LDPC codes are widely adopted in various kinds of communication specifications for excellent error-correcting performance. However, the release-8 version of 3GPP-LET mobile communication standards no longer considered LDPC for the difficulties on providing flexible code-rates and variable codeword length. Moreover, in order to satisfy high-speed transmission requirements on various hand-held mobile devices, the latest release-9 and release-10 version (LTE-Advance) further raises the peak rate of downlink to 100Mbps~1Gbps. How to achieve 1Gbps throughput, to provide flexible coding rates, and to reduce the power consumption is still very challenging to Turbo code design. Accordingly, this research project will focus on both Turbo codes and LDPC convolutional codes (LDPC-CC) which combine the excellent error-correcting performance similar to LDPC block codes and variable data frame size similar to convolutional codes. The drawbacks of LDPC-CC including the long decoding latency, low parallelism, and low to medium decoding throughput will be conquered. In addition to discussion and analysis of the above research issues, this project will also employ the low power and low cost design flow to eventually design an error correcting encoder/decoder for LTE-Advance system with over 1Gbps throughput and less than 0.2W power consumption. The related work will be submitted to ISSCC and JSSC.