Title: 高性能混合訊號式發收機積體電路---子計畫三:高速雙絞線網路發收機單晶片系統
High-Speed Twisted-Pair Network Transceiver System-on-a-Chip
Authors: 吳介琮
WU JIEH-TSORNG
國立交通大學電子工程學系
Issue Date: 2000
Gov't Doc #: NSC89-2218-E009-084
URI: http://hdl.handle.net/11536/99139
https://www.grb.gov.tw/search/planDetail?id=597406&docId=112579
Appears in Collections:Research Plans