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dc.contributor.author陳穎平en_US
dc.contributor.authorCHEN YING-PINGen_US
dc.date.accessioned2014-12-13T10:42:56Z-
dc.date.available2014-12-13T10:42:56Z-
dc.date.issued2011en_US
dc.identifier.govdocNSC100-2623-E009-007-Dzh_TW
dc.identifier.urihttp://hdl.handle.net/11536/99473-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=2207343&docId=352339en_US
dc.description.abstractShort wave infrared (SWIR), read-out integrated circuit (ROIC) and focal plane array (FPA).zh_TW
dc.description.abstractMost of the hardware Trojan horse is a passive monitor and extend the operational life cycle until they are triggered. Trojan hidden hardware features, this means that they are hidden under the normal operation of the circuit themselves, and unlike most circuits can be controlled as observed that if after the dismantling of the chip, the detection of this devastating result in the chip must be discarded, and can not guarantee that other chips have not been hardware Trojan horse attacks. This project is expected to adopt side-channel signals (SCS) to detect the hardware Trojans, as belonging to the testing-based methods, based on the measurement next to the channel signal parameters (power consumption, delay time, etc.). When a circuit is a malicious Trojan added hardware, the hardware Trojan causes some significant changes in parameters. In first, we can measure a non-Trojan (Trojan-free) circuit next to the channel signal parameters as a benchmark. If such parameters are significantly different, we can confirm that the circuit have been maliciously into the Trojan.en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject硬體安全防護zh_TW
dc.subject惡意電路zh_TW
dc.subject硬體木馬zh_TW
dc.subject旁通道訊號分析zh_TW
dc.subjecthardware trojan horseen_US
dc.subjectmalicious circuiten_US
dc.subjecthardware security detectionen_US
dc.subjectside-channel analysisen_US
dc.title硬體惡意行為檢測技術研究zh_TW
dc.titleDetection of Hardware Trojanen_US
dc.typePlanen_US
dc.contributor.department國立交通大學資訊工程學系(所)zh_TW
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