Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 李毅郎 | en_US |
dc.contributor.author | Li Yih-Lang | en_US |
dc.date.accessioned | 2014-12-13T10:43:32Z | - |
dc.date.available | 2014-12-13T10:43:32Z | - |
dc.date.issued | 2010 | en_US |
dc.identifier.govdoc | NSC99-2220-E009-036 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/99796 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2159206&docId=347505 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 信號矽穿孔 | zh_TW |
dc.subject | 廣域繞線 | zh_TW |
dc.subject | 三維積體電路 | zh_TW |
dc.subject | Signal Through-Silicon-Vias | en_US |
dc.subject | Global Routing | en_US |
dc.subject | 3D IC | en_US |
dc.title | 針對3D整合之電子設計自動化技術開發---子計畫二:三維電路整合之實體設計系統(II) | zh_TW |
dc.title | Physical Design in 3D IC Integration (II) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學資訊工程學系(所) | zh_TW |
Appears in Collections: | Research Plans |