On-Current Decrease After Erasing Operation in the Nonvolatile Memory Device With LDD Structure

Abstract

The on-current decrease phenomenon is observed after erasing operation in the silicon-oxide-nitride-oxide-silicon thin-film transistors (TFTs) with lightly doped drain (LDD) structure. As nonvolatile memory, when the TFT is programmed again, the on-current decrease phenomenon can be recovered. The on-current decrease and recovery are explained by the energy band diagrams at different drain biases. The explanation implies that this phenomenon only appears in the device with LDD structure, but not in the device without LDD structure, which is experimentally verified.