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On-Current Decrease After Erasing Operation in the Nonvolatile Memory Device With LDD Structure

dc.citation.epage1040en_US
dc.citation.issue8en_US
dc.citation.spage1038en_US
dc.citation.volume32en_US
dc.citation.woscount3
dc.contributor.authorChang, Geng-Weien_US
dc.contributor.authorChang, Ting-Changen_US
dc.contributor.authorSyu, Yong-Enen_US
dc.contributor.authorTai, Ya-Hsiangen_US
dc.contributor.authorJian, Fu-Yenen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.date.accessioned2014-12-08T15:28:51Z
dc.date.available2014-12-08T15:28:51Z
dc.date.issued2011-08-01en_US
dc.description.abstractThe on-current decrease phenomenon is observed after erasing operation in the silicon-oxide-nitride-oxide-silicon thin-film transistors (TFTs) with lightly doped drain (LDD) structure. As nonvolatile memory, when the TFT is programmed again, the on-current decrease phenomenon can be recovered. The on-current decrease and recovery are explained by the energy band diagrams at different drain biases. The explanation implies that this phenomenon only appears in the device with LDD structure, but not in the device without LDD structure, which is experimentally verified.en_US
dc.identifier.doi10.1109/LED.2011.2158182en_US
dc.identifier.issn0741-3106en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2011.2158182en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/20849
dc.identifier.wosnumberWOS:000293710400015
dc.language.isoen_USen_US
dc.subjectLightly doped drain (LDD)en_US
dc.subjectnonvolatile memoryen_US
dc.subjecton-current decreaseen_US
dc.subjectsilicon-oxide-nitride-oxide-silicon thin-film transistor (SONOS TFT)en_US
dc.titleOn-Current Decrease After Erasing Operation in the Nonvolatile Memory Device With LDD Structureen_US
dc.typeArticleen_US

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