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92% High Efficiency and Low Current Mismatch Interleaving Power Factor Correction Controller With Variable Sampling Slope and Automatic Loading Detection Techniques

dc.citation.epage5173en_US
dc.citation.issue11en_US
dc.citation.spage5159en_US
dc.citation.volume28en_US
dc.citation.woscount0
dc.contributor.authorSu, Yi-Pingen_US
dc.contributor.authorChen, Chun-Yenen_US
dc.contributor.authorNi, Chia-Lungen_US
dc.contributor.authorKang, Yu-Chaien_US
dc.contributor.authorChen, Yi-Tingen_US
dc.contributor.authorTsai, Jen-Chiehen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorWang, Shih-Mingen_US
dc.contributor.authorLiang, Chao-Chiunen_US
dc.contributor.authorHo, Chang-Anen_US
dc.contributor.authorYu, Tun-Haoen_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.date.accessioned2014-12-08T15:30:55Z
dc.date.available2014-12-08T15:30:55Z
dc.date.issued2013-11-01en_US
dc.description.abstractThis paper proposes the dual nondeadtime variable sampling slope technique to carry out precise phase sensing and suppress phase error in interleaving power factor correction (PFC) controller over a whole ac switching cycle for low current mismatch. Furthermore, the proposed automatic loading detection (ALD) technique can keep efficiency higher than 92% over a wide load range due to accurately controlling the ON/OFF of dual phases. The test circuit fabricated in the TSMC 0.5-mu m 800-V UHV process shows that the highly integrated interleaving PFC can deliver a high power of 180 W and a high efficiency of 95% at an output power of 180 W.en_US
dc.identifier.doi10.1109/TPEL.2013.2240395en_US
dc.identifier.issn0885-8993en_US
dc.identifier.journalIEEE TRANSACTIONS ON POWER ELECTRONICSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TPEL.2013.2240395en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/22084
dc.identifier.wosnumberWOS:000320330400029
dc.language.isoen_USen_US
dc.subjectAutomatic loading detection (ALD)en_US
dc.subjectdual nondeadtime variable sampling slope (DNVSS)en_US
dc.subjectinterleaving power factor correction (PFC)en_US
dc.title92% High Efficiency and Low Current Mismatch Interleaving Power Factor Correction Controller With Variable Sampling Slope and Automatic Loading Detection Techniquesen_US
dc.typeArticleen_US

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