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Hot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technology

dc.citation.epage600en_US
dc.citation.issue12en_US
dc.citation.spage598en_US
dc.citation.volume21en_US
dc.citation.woscount9
dc.contributor.authorWang, HCHen_US
dc.contributor.authorDiaz, CHen_US
dc.contributor.authorLiew, BKen_US
dc.contributor.authorSun, JYCen_US
dc.contributor.authorWang, THen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:44:34Z
dc.date.available2014-12-08T15:44:34Z
dc.date.issued2000-12-01en_US
dc.description.abstractThis letter presents a deep submicron CMOS process that takes advantage of phosphorus transient enhanced diffusion (TED) to improve the hot carrier reliability of 3.3 V input/output transistors, Arsenic/phosphorus LDI) nMOSFETs with and without TED are fabricated. The TED effects on a LDD junction profile, device substrate current and transconductance degradation are evaluated, Substantial substrate current reduction and hot carrier lifetime improvement for the input/output devices are attained due to a more graded n(-) LDD doping profile by taking advantage of phosphorus TED.en_US
dc.identifier.doi10.1109/55.887478en_US
dc.identifier.issn0741-3106en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.887478en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/30092
dc.identifier.wosnumberWOS:000165684000018
dc.language.isoen_USen_US
dc.subjecthot carriersen_US
dc.subjectMOS devicesen_US
dc.subjecttransient enhanced diffusionen_US
dc.titleHot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technologyen_US
dc.typeArticleen_US

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