Gate oxide integrity of thermal oxide grown on high temperature formed Si0.3Ge0.7
| dc.citation.epage | 115 | en_US |
| dc.citation.issue | 3 | en_US |
| dc.citation.spage | 113 | en_US |
| dc.citation.volume | 21 | en_US |
| dc.citation.woscount | 13 | |
| dc.contributor.author | Wu, YH | en_US |
| dc.contributor.author | Chin, A | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:45:36Z | |
| dc.date.available | 2014-12-08T15:45:36Z | |
| dc.date.issued | 2000-03-01 | en_US |
| dc.description.abstract | We have investigated the gate oxide integrity of thermal oxides direct grown on high temperature formed Si0.3Ge0.7 Good oxide integrity is evidenced by the low interface-trap density of 5.9 x 10(10) eV(-1)cm(-2), low oxide charge density of -5.6 x 10(10) cm(-2), and the small stress-induced leakage current after -3.3 V stress for 10 000 s, The good gate oxide integrity is due to the high temperature formed and strain-relaxed Si0.3Ge0.7 that has a original smooth surface and stable after subsequent high temperature process. | en_US |
| dc.identifier.doi | 10.1109/55.823573 | en_US |
| dc.identifier.issn | 0741-3106 | en_US |
| dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/55.823573 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/30684 | |
| dc.identifier.wosnumber | WOS:000085620800007 | |
| dc.language.iso | en_US | en_US |
| dc.subject | gate oxide integrity | en_US |
| dc.subject | SiGe oxide | en_US |
| dc.subject | stress-induced leakage current | en_US |
| dc.title | Gate oxide integrity of thermal oxide grown on high temperature formed Si0.3Ge0.7 | en_US |
| dc.type | Article | en_US |