AN ALTERNATIVE APPROACH FOR DESIGNING MAXIMALLY FLAT LOW-PASS FILTERS WITH MULTIPLE ORDER IMAGINARY-AXIS ZEROS
| dc.citation.epage | 644 | en_US |
| dc.citation.issue | 6 | en_US |
| dc.citation.spage | 642 | en_US |
| dc.citation.volume | 33 | en_US |
| dc.citation.woscount | 4 | |
| dc.contributor.author | WEI, CH | en_US |
| dc.contributor.department | 交大名義發表 | zh_TW |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | National Chiao Tung University | en_US |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:06:10Z | |
| dc.date.available | 2014-12-08T15:06:10Z | |
| dc.date.issued | 1986-06-01 | en_US |
| dc.identifier.issn | 0098-4094 | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/4738 | |
| dc.identifier.wosnumber | WOS:A1986C419500008 | |
| dc.language.iso | en_US | en_US |
| dc.title | AN ALTERNATIVE APPROACH FOR DESIGNING MAXIMALLY FLAT LOW-PASS FILTERS WITH MULTIPLE ORDER IMAGINARY-AXIS ZEROS | en_US |
| dc.type | Note | en_US |