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公開日期標題作者
2014Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETsChen, Min-Cheng; Lin, Chia-Yi; Li, Kai-Hsin; Li, Lain-Jong; Chen, Chang-Hsiao; Chuang, Cheng-Hao; Lee, Ming-Dao; Chen, Yi-Ju; Hou, Yun-Fang; Lin, Chang-Hsien; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Yeh, Wen-Kuan; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016MOS2 U-shape MOSFET with 10 nm Channel Length and Poly-Si Source/Drain Serving as Seed for Full Wafer CVD MOS2 AvailabilityLi, Kai-Shin; Wu, Bo-Wei; Li, Lain-Jong; Li, Ming-Yang; Cheng, Chia-Chin Kevin; Hsu, Cho-Lun; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Wu, Chien-Ting; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Chueh, Yu-Lun; Yang, Fu-Liang; Hu, Chenming; 材料科學與工程學系; Department of Materials Science and Engineering
1-一月-2018Negative-Capacitance FinFET Inverter, Ring Oscillator, SRAM Cell, and FtLi, Kai-Shin; Wei, Yun-Jie; Chen, Yi-Ju; Chiu, Wen-Cheng; Chen, Hsiu-Chih; Lee, Min-Hung; Chiu, Yu-Fan; Hsueh, Fu-Kuo; Wu, Bo-Wei; Chen, Pin-Guang; Lai, Tung-Yan; Chen, Chun-Chi; Shieh, Jia-Min; Yeh, Wen-Kuan; Salahuddin, Sayeef; Hu, Chenming; 交大名義發表; National Chiao Tung University
17-四月-2020Nonvolatile molecular memory with the multilevel states based on MoS2 nanochannel field effect transistor through tuning gate voltage to control molecular configurationsLan, Yann-Wen; Hong, Chuan-Jie; Chen, Po-Chun; Lin, Yun-Yan; Yang, Chih-Hao; Chu, Chia-Jung; Li, Ming-Yang; Li, Lain-Jong; Su, Chun-Jung; Wu, Bo-Wei; Hou, Tuo-Hung; Li, Kai-Shin; Zhong, Yuan-Liang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2016A Numerical Study of Si-TMD Contact with n/p Type Operation and Interface Barrier Reduction for Sub-5 nm Monolayer MoS2 FETTang, Ying-Tsan; Li, Kai-Shin; Li, Lain-Jong; Li, Ming-Yang; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Su, Chuan-Jung; Wu, Bo-Wei; Wu, Cheng-San; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Su, Po-Cheng; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming; 電機工程學系; Department of Electrical and Computer Engineering
2015TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power TechnologyChen, Min-Cheng; Li, Kai-Shin; Li, Lain-Jong; Lu, Ang-Yu; Li, Ming-Yang; Chang, Yung-Huang; Lin, Chang-Hsien; Chen, Yi-Ju; Hou, Yun-Fang; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Shieh, Jia-Min; Yeh, Wen-Kuan; Shih, Jyun-Hong; Su, Po-Cheng; Sachid, Angada B.; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
顯示 3 到 8 筆資料，總共 8 筆 < 上一頁