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公開日期標題作者
1-五月-2015A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-AssistLu, Chien-Yu; Chuang, Ching-Te; Jou, Shyh-Jye; Tu, Ming-Hsien; Wu, Ya-Ping; Huang, Chung-Ping; Kan, Paul-Sen; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2012A 0.33-V, 500-kHz, 3.94-mu W 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-AssistLu, Chien-Yu; Tu, Ming-Hsien; Yang, Hao-I; Wu, Ya-Ping; Huang, Huan-Shun; Lin, Yuh-Jiun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
20140.339fJ/bit/search Energy-Efficient TCAM Macro Design in 40nm LP CMOSHuang, Po-Tsang; Lai, Shu-Lin; Chuang, Ching-Te; Hwang, Wei; Huang, Jason; Hu, Angelo; Kan, Paul; Jia, Michael; Lv, Kimi; Zhang, Bright; 電機工程學系; Department of Electrical and Computer Engineering
五月-2016A 0.35 V, 375 kHz, 5.43 mu W, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-lineWu, Shang-Lin; Lu, Chien-Yu; Tu, Ming-Hsien; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-20180.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS ProcessChan, Yun-Sheng; Huang, Po-Tsang; Wu, Shang-Lin; Lung, Sheng-Chi; Wang, Wei-Chang; Hwang, Wei; Chuang, Ching-Te; 電子工程學系及電子研究所; 國際半導體學院; Department of Electronics Engineering and Institute of Electronics; International College of Semiconductor Technology
1-七月-2017A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-AssistWu, Shang-Lin; Li, Kuang-Yu; Huang, Po-Tsang; Hwang, Wei; Tu, Ming-Hsien; Lung, Sheng-Chi; Peng, Wei-Sheng; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-20142.5D Heterogeneously Integrated Bio-Sensing Microsystem for Multi-Channel Neural-Sensing ApplicationsHuang, Po-Tsang; Chou, Lei-Chun; Huang, Teng-Chieh; Wu, Shang-Lin; Wang, Tang-Shuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chen, Kuan-Neng; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Cheng, Ming-Hsiang; Lin, Yueh-Lung; Tong, Ho-Ming; 交大名義發表; National Chiao Tung University
1-十二月-20142.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing ApplicationsHuang, Po-Tsang; Wu, Shang-Lin; Huang, Yu-Chieh; Chou, Lei-Chun; Huang, Teng-Chieh; Wang, Tang-Hsuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Tong, Ho-Ming; 交大名義發表; National Chiao Tung University
1-一月-201828nm Near/Sub-Threshold Dual-Port FIFO Memory for Shared Queues in Multi-Sensor ApplicationsWu, Yi-Chun; Huang, Po-Tsang; Wu, Shang-Lin; Lung, Sheng-Chi; Wang, Wei-Chang; Hwang, Wei; Chuang, Ching-Te; 電子工程學系及電子研究所; 國際半導體學院; Department of Electronics Engineering and Institute of Electronics; International College of Semiconductor Technology
201628nm Ultra-Low Power Near-/Sub- threshold First-In-First-Out (FIFO) Memory for Multi-Bio-Signal Sensing PlatformsHsu, Wei-Shen; Huang, Po-Tsang; Wu, Shang-Lin; Chuang, Ching-Te; Hwang, Wei; Tu, Ming-Hsien; Yin, Ming-Yu; 電子工程學系及電子研究所; 電機工程學系; Department of Electronics Engineering and Institute of Electronics; Department of Electrical and Computer Engineering
201728奈米近臨界電壓使用12顆電晶體搭配短反或閘型匹配線之管線化的三態內容可定址記憶體陳俊丞; 莊景德; 黃威; Chen, Jyun-Cheng; Chuang, Ching-Te; Hwang, Wei; 電子研究所
2013A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-AssistChiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2014A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-AssistLien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-201440 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-AssistChiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
201240 奈米製程技術操縱在低操縱電壓及管線結構的512Kb 8T 靜態隨機存取記憶體朱俐瑋; Chu, Li-Wei; 莊景德; Chuang, Ching-Te; 電子研究所
1-一月-2013A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting ControlLiao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-AssistChang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
201240奈米1.0Mb 6T管線化靜態隨機存取記憶體與三步階升壓型字元線和位元線降壓和適應性電壓偵測廖偉男; Liao, Wei-Nan; 莊景德; Chuang, Ching-Te; 電子研究所
201140奈米1.0Mb 6T管線化靜態隨機存取記憶體與步階升壓型字元線和適應性數據感知寫入輔助設計張琦昕; Chang, chi-Shin; 莊景德; Chuang, Ching-Te; 電子研究所
201340奈米製程技術操縱在低操縱電壓的256-Kb 8T 靜態隨機存取記憶體張智皓; Chang, Zhi-Hao; 莊景德; Chuang, Ching-Te; 電子工程學系 電子研究所
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