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公開日期標題作者
1-二月-2008Characteristics of PBTI and hot carrier stress for LTPS-TFT with high-kappa gate dielectricMa, Ming-Wen; Chen, Chih-Yang; Su, Chun-Jung; Wu, Woei-Cherng; Wu, Yi-Hong; Kao, Kuo-Hsing; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Demonstration of Annealing-free Metal-Insulator-Semiconductor (MIS) Ohmic Contacts on a GaN Substrate using Low Work-function Metal Ytterbium (Yb) and Al2O3 Interfacial LayerWu, Tian-Li; Tseng, Yang-Yan; Huang, Chih-Fang; Chen, Zih-Sin; Lin, Chih-Chien; Chung, Chung-Jen; Huang, Po-Kai; Kao, Kuo-Hsing; 國際半導體學院; International College of Semiconductor Technology
2015Diamond-shaped Ge and Ge0.9Si0.1 Gate-All-Around Nanowire FETs with Four {111} Facets by Dry Etch TechnologyLee, Yao-Jen; Hou, Fu-Ju; Chuang, Shang-Shiun; Hsueh, Fu-Kuo; Kao, Kuo-Hsing; Sung, Po-Jung; Yuan, Wei-You; Yao, Jay-Yi; Lu, Yu-Chi; Lin, Kun-Lin; Wu, Chien-Ting; Chen, Hisu-Chih; Chen, Bo-Yuan; Huang, Guo-Wei; Chen, Henry J. H.; Li, Jiun-Yun; Li, Yiming; Samukawa, Seiji; Chao, Tien-Sheng; Tseng, Tseung-Yuen; Wu, Wen-Fa; Hou, Tuo-Hung; Yeh, Wen-Kuan; 電子物理學系; 電機學院; 電子工程學系及電子研究所; Department of Electrophysics; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
1-九月-2020Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET InvertersSung, Po-Jung; Chang, Shu-Wei; Kao, Kuo-Hsing; Wu, Chien-Ting; Su, Chun-Jung; Cho, Ta-Chun; Hsueh, Fu-Kuo; Lee, Wen-Hsi; Lee, Yao-Jen; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2008Fluorinated HfO2 Gate Dielectrics Engineering for CMOS by pre- and post-CF4 Plasma PassivationWu, Woei-Chemg; Lai, Chao-Sung; Lee, Shih-Ching; Ma, Ming-Wen; Chao, Tien-Sheng; Wang, Jer-Chyi; Hsu, Chih-Wei; Chou, Pai-Chi; Chen, Jian-Hao; Kao, Kuo-Hsing; Lo, Wen-Cheng; Lu, Tsung-Yi; Tay, Li-Lin; Rowell, Nelson; 電子物理學系; Department of Electrophysics
1-九月-2006Fringing electric field effect on 65-nm-node fully depleted silicon-on-insulator devicesMa, Ming-Wen; Chao, Tien-Sheng; Kao, Kuo-Hsing; Huang, Jyun-Siang; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015High Performance Poly Si Junctionless Transistors with Sub-5nm Conformally Doped Layers by Molecular Monolayer Doping and Microwave Incorporating CO2 Laser Annealing for 3D Stacked ICs ApplicationsLee, Yao-Jen; Cho, Ta-Chun; Sung, Po-Jung; Kao, Kuo-Hsing; Hsueh, Fu-Kuo; Hou, Fu-Ju; Chen, Po-Cheng; Chen, Hsiu-Chih; Wu, Chien-Ting; Hsu, Shu-Han; Chen, Yi-Ju; Huang, Yao-Ming; Hou, Yun-Fang; Huang, Wen-Hsien; Yang, Chih-Chao; Chen, Bo-Yuan; Lin, Kun-Lin; Chen, Min-Cheng; Shen, Chang-Hong; Huang, Guo-Wei; Huang, Kun-Ping; Current, Michael I.; Li, Yiming; Samukawa, Seiji; Wu, Wen-Fa; Shieh, Jia-Min; Chao, Tien-Sheng; Yeh, Wen-Kuan; 電子物理學系; 電機學院; Department of Electrophysics; College of Electrical and Computer Engineering
1-十一月-2006High-kappa material sidewall with source/drain-to-gate non-overlapped structure for low standby power applicationsMa, Ming-Wen; Chao, Tien-Sheng; Kao, Kuo-Hsing; Huang, Jyun-Siang; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-六月-2008High-performance metal-induced laterally crystallized polycrystalline silicon p-channel thin-film transistor with TaN/HfO2 gate stack structureMa, Ming-Wen; Chao, Tien-Sheng; Su, Chun-Jung; Wu, Woei-Cherng; Kao, Kuo-Hsing; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-三月-2007Impact of high-k offset spacer in 65-nm node SOI devicesMa, Ming-Wen; Wu, Chien-Hung; Yang, Tsung-Yu; Kao, Kuo-Hsing; Wu, Woei-Cherng; Wang, Shui-Jinn; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-四月-2020Impact of the polarization on time-dependent dielectric breakdown in ferroelectric Hf0.5Zr0.5O2 on Ge substratesYang, Ting-Hsin; Su, Chun-Jung; Wang, Yu-Shun; Kao, Kuo-Hsing; Lee, Yao-Jen; Wu, Tian-Li; 國際半導體學院; International College of Semiconductor Technology
1-二月-2008Impacts of fluorine ion implantation with low-temperature solid-phase crystallized activation on high-kappa LTPS-TFTMa, Ming-Wen; Chen, Chih-Yang; Su, Chun-Jung; Wu, Woei-Cherng; Wu, Yi-Hong; Yang, Tsung-Yu; Kao, Kuo-Hsing; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
2007Impacts of nitric acid oxidation on low-temperature polycrystalline silicon TFTs with high-k gate dielectricYang, Tsung-Yu; Ma, Ming-Wen; Kao, Kuo-Hsing; Su, Chun-Jung; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; Department of Electrophysics
1-十一月-2015Impacts of the Shell Doping Profile on the Electrical Characteristics of Junctionless FETsKumar, Malkundi Puttaveerappa Vijay; Hu, Chia-Ying; Kao, Kuo-Hsing; Lee, Yao-Jen; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-三月-2008Improvement on performance and reliability of TaN/HfO2 LTPS-TFTs with fluorine implantationMa, Ming-Wen; Chen, Chih-Yang; Su, Chun-Jung; Wu, Woei-Cherng; Yang, Tsung-Yu; Kao, Kuo-Hsing; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-九月-2017Improving the Electrical Performance of a Quantum Well FET With a Shell Doping Profile by Heterojunction OptimizationKumar, Malkundi Puttaveerappa Vijay; Hu, Chia-Ying; Walke, Amey Mahadev; Kao, Kuo-Hsing; Chao, Tien-Sheng; 物理研究所; Institute of Physics
1-八月-2018Junctionless FETs With a Fin Body for Multi-V-TH and Dynamic Threshold OperationKumar, Malkundi Puttaveerappa Vijay; Lin, Jer-Yi; Kao, Kuo-Hsing; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2007Mobility improvement of HfO2 LTPS-TFTs with nitrogen implanataionMa, Ming-Wen; Yang, Tsung-Yu; Kao, Kuo-Hsing; Su, Chun-Jung; Chao, Tien-Sheng; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2008Reliability mechanisms of LTPS-TFT with HfO2 gate dielectric: PBTI, NBTI, and hot-carrier stressMa, Ming-Wen; Chen, Chih-Yang; Wu, Woei-Cherrig; Su, Chun-Jung; Kao, Kuo-Hsing; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Ultra-Shallow Junction Formation by Monolayer Doping Process in Single Crystalline Si and Ge for Future CMOS DevicesChuang, Shang-Shiun; Cho, Ta-Chun; Sung, Po-Jung; Kao, Kuo-Hsing; Chen, Henry J. H.; Lee, Yao-Jen; Current, Michael I.; Tseng, Tseung-Yuen; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
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