Impacts of fluorine ion implantation with low-temperature solid-phase crystallized activation on high-kappa LTPS-TFT

Abstract

In this letter, fluorine ion implantation with low-temperature solid-phase crystallized activation scheme is used to obtain a high-performance HfO2 low-temperature poly-Si thin-film transistor (LTPS-TFT) for the first time. The secondary ion mass spectrometer (SIMS) analysis shows a different fluorine profile compared to that annealed at high temperature. About one order current reduction of I-min is achieved because 25% grain-boundary traps are passivated by fluorine implantation. In addition, the threshold voltage instability of hot carrier stress is also improved with the introduction of fluorine. The LTPS-TFT with HfO2 gate dielectric and fluorine preimplantation can simultaneously achieve low V-TH similar to 1.32 V, excellent subthreshold swing similar to 0.141 V/dec, and high I-ON/I-min current ratio 1.98 x 10(7).