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顯示 1 到 13 筆資料，總共 13 筆
公開日期標題作者
1-七月-2014A 2.56 Gb/s Soft RS (255,239) Decoder Chip for Optical Communication SystemsLin, Yi-Min; Hsu, Chih-Hsiang; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2010A 26.9 K 314.5 Mb/s Soft (32400,32208) BCH Decoder Chip for DVB-S2 SystemLin, Yi-Min; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 26.9K 314.5Mbps Soft (32400,32208) BCH Decoder Chip for DVB-S2 SystemLin, Yi-Min; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2008A compact RF CMOS modeling for accurate high-frequency noise simulation in sub-100-nm MOSFETsGuo, Jyh-Chyurn; Lin, Yi-Min; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012A Fully Parallel BCH Codec with Double Error Correcting Capability for NOR Flash ApplicationsChu, Chia-Ching; Lin, Yi-Min; Yang, Chi-Heng; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2013Improved High Code-Rate Soft BCH Decoder Architectures With One Extra Error CompensationLin, Yi-Min; Chang, Hsie-Chia; Lee, Chen-Yi; 電機工程學系; Department of Electrical and Computer Engineering
2009A Long Block Length BCH Decoder for DVB-S2 ApplicationLin, Yi-Min; Wu, Jau-Yet; Lin, Chien-Ching; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2015An MPCN-Based BCH Codec Architecture With Arbitrary Error Correcting CapabilityYang, Chi-Heng; Lin, Yi-Min; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2011A MPCN-Based Parallel Architecture in BCH Decoders for NAND Flash Memory DevicesLin, Yi-Min; Yang, Chi-Heng; Hsu, Chih-Hsiang; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2006A new lossy substrate model for accurate RF CMOS noise extraction and simulation with frequency and bias dependenceGuo, Jyh-Chyurn; Lin, Yi-Min; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008RF Noise Shielding Method and Modelling for Nanoscale MOSFETGuo, Jyh-Chyurn; Lin, Yi-Min; Tsai, Yi-Hsiu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010應用類神經網路於臺灣期貨指數極短線走勢行為知識發現林益民; Lin, Yi-Min; 陳安斌; Chen, An-Pin; 資訊管理研究所
2010高面積效益軟性BCH及RS解碼器林義閔; Lin, Yi-Min; 李鎮宜; 張錫嘉; Lee, Chen-Yi; Chang, Hsie-Chia; 電子研究所
顯示 1 到 13 筆資料，總共 13 筆