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公開日期標題作者
2011Accelerating Dynamic Peak Power Analysis Using An Essential-Signal-Based MethodologyShih, Che-Hua; Yen, Chia-Chih; Lin, Shen-Tien; Lin, Hermes; Jou, Jing-Yang; 交大名義發表; National Chiao Tung University
1-五月-2009Automatic Verification Stimulus Generation for Interface Protocols Modeled With Non-Deterministic Extended FSMShih, Che-Hua; Huang, Juinn-Dar; Jon, Jing-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011Equivalence Checking of Scheduling with Speculative Code Transformations in High-Level SynthesisLee, Chi-Hui; Shih, Che-Hua; Huang, Juinn-Dar; Jou, Jing-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2010FSM-Based Formal Compliance Verification of Interface ProtocolsShih, Che-Hua; Yang, Ya-Ching; Yen, Chia-Chih; Huang, Juinn-Dar; Jou, Jing-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006FSM-based transaction-level functional coverage for interface compliance verificationSu, Man-Yun; Shih, Che-Hua; Huang, Juinn-Dar; Jou, Jing-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009利用延伸式有限狀態機來實現介面規格相符驗證之研究石哲華; Shih, Che-Hua; 周景揚; Jou, Jing-Yang; 電子研究所
顯示 1 到 6 筆資料，總共 6 筆