Browsing by Author Tsai, Hui-Wen
Showing results 1 to 11 of 11
| Issue Date | Title | Author(s) |
| 1-Dec-2014 | Active Guard Ring to Improve Latch-Up Immunity | Tsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Jan-2013 | Analysis and Solution to Overcome EOS Failure Induced by Latchup Test in A High-Voltage Integrated Circuits | Tsai, Hui-Wen; Ker, Ming-Dou; Liu, Yi-Sheng; Chuang, Ming-Nan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2013 | Analysis and Solution to Overcome EOS Failure Induced by Latchup Test in A High-Voltage Integrated Circuits | Tsai, Hui-Wen; Ker, Ming-Dou; Liu, Yi-Sheng; Chuang, Ming-Nan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2015 | Compensation Circuit with Additional Junction Sensor to Enhance Latchup Immunity for CMOS Integrated Circuits | Tsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2007 | Design of 2xVDD-tolerant I/O buffer with considerations of gate-oxide reliability and hot-carrier degradation | Tsai, Hui-Wen; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering |
| 1-Jan-2010 | Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradation | Tsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-May-2011 | Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process | Weng, Yi-Hsin; Tsai, Hui-Wen; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering |
| 2015 | Improve Latch-up Immunity by Circuit Solution | Tsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Jun-2015 | Latch-Up Protection Design With Corresponding Complementary Current to Suppress the Effect of External Current Triggers | Tsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Mar-2014 | Layout Consideration and Circuit Solution to Prevent EOS Failure Induced by Latchup Test in a High-Voltage Integrated Circuits | Tsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2015 | 提升積體電路栓鎖防疫能力之設計方法與實現 | 蔡惠雯; Tsai, Hui-Wen; 柯明道; Ker, Ming-Dou; 電子工程學系 電子研究所 |
