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Showing results 1 to 11 of 11
Issue DateTitleAuthor(s)
1-Dec-2014Active Guard Ring to Improve Latch-Up ImmunityTsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2013Analysis and Solution to Overcome EOS Failure Induced by Latchup Test in A High-Voltage Integrated CircuitsTsai, Hui-Wen; Ker, Ming-Dou; Liu, Yi-Sheng; Chuang, Ming-Nan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Analysis and Solution to Overcome EOS Failure Induced by Latchup Test in A High-Voltage Integrated CircuitsTsai, Hui-Wen; Ker, Ming-Dou; Liu, Yi-Sheng; Chuang, Ming-Nan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015Compensation Circuit with Additional Junction Sensor to Enhance Latchup Immunity for CMOS Integrated CircuitsTsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007Design of 2xVDD-tolerant I/O buffer with considerations of gate-oxide reliability and hot-carrier degradationTsai, Hui-Wen; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering
1-Jan-2010Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradationTsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-May-2011Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS processWeng, Yi-Hsin; Tsai, Hui-Wen; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering
2015Improve Latch-up Immunity by Circuit SolutionTsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jun-2015Latch-Up Protection Design With Corresponding Complementary Current to Suppress the Effect of External Current TriggersTsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Mar-2014Layout Consideration and Circuit Solution to Prevent EOS Failure Induced by Latchup Test in a High-Voltage Integrated CircuitsTsai, Hui-Wen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015提升積體電路栓鎖防疫能力之設計方法與實現蔡惠雯; Tsai, Hui-Wen; 柯明道; Ker, Ming-Dou; 電子工程學系 電子研究所
Showing results 1 to 11 of 11