| Issue Date | Title | Author(s) |
| 1-Aug-2013 | Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors | Chen, Kun-Ming; Tsai, Tzu-I; Lin, Ting-Yao; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Guo-Wei; Huang, Tiao-Yuan; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics |
| 1-Mar-2011 | Fabrication of sub-100-nm metal-oxide-semiconductor field-effect transistors with asymmetrical source/drain using I-line double patterning technique | Lin, Horng-Chih; Tsai, Tzu-I; Chao, Tien-Sheng; Jian, Min-Feng; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Apr-2011 | Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels | Su, Chun-Jung; Tsai, Tzu-I; Liou, Yu-Ling; Lin, Zer-Ming; Lin, Horng-Chih; Chao, Tien-Sheng; 電子物理學系; 電子工程學系及電子研究所; 奈米中心; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics; Nano Facility Center |
| 1-Oct-2008 | Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer | Tsai, Tzu-I; Lin, Horng-Chih; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Hsueh, Fu-Kuo; Chao, Tien-Sheng; Huang, Tiao-Yuan; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics |
| 29-二月-2012 | A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires | Su, Chun-Jung; Su, Tuan-Kai; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; 奈米中心; Department of Electronics Engineering and Institute of Electronics; Nano Facility Center |
| 1-十一月-2012 | Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications | Tsai, Tzu-I; Chen, Kun-Ming; Lin, Horng-Chih; Lin, Ting-Yao; Su, Chun-Jung; Chao, Tien-Sheng; Huang, Tiao-Yuan; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics |
| 1-一月-1970 | Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique | Su, Chun-Jung; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; Chao, Tien-Sheng; 電子物理學系; 電子工程學系及電子研究所; 奈米中心; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics; Nano Facility Center |
| 1-五月-2010 | A simple method for sub-100 nm pattern generation with I-line double-patterning technique | Tsai, Tzu-I; Lin, Horng-Chih; Jian, Min-Feng; Huang, Tiao-Yuan; Chao, Tien-Sheng; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics |
| 2013 | 非對稱金氧半場效電晶體及無接面多晶矽薄膜電晶體的研究 | 蔡子儀; Tsai, Tzu-I; 趙天生; 林鴻志; 黃調元; Chao, Tien-Sheng; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子物理系所 |
