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公開日期標題作者
2013Area-Efficient Power-Rail ESD Clamp Circuit with SCR Device Embedded into ESD-Transient Detection Circuit in a 65nm CMOS ProcessYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2010Capacitor-Less Design of Power-Rail ESD Clamp Circuit With Adjustable Holding Voltage for On-Chip ESD ProtectionYeh, Chih-Ting; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering
1-十一月-2010Capacitor-Less Design of Power-Rail ESD Clamp Circuit With Adjustable Holding Voltage for On-Chip ESD ProtectionYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011Design of Power-Rail ESD Clamp Circuit with Adjustable Holding Voltage against Mis-trigger or Transient-Induced Latch-On EventsYeh, Chih-Ting; Liang, Yung-Chih; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
5-四月-2016An experimental and analytical investigation of the photo-thermal-electro characteristics of a high power InGaN LED moduleYang, Kai-Shing; Ding, Wei-Ting; Yeh, Chih-Ting; Lee, Ming-Tsang; Wang, Chi-Chuan; 機械工程學系; Department of Mechanical Engineering
1-三月-2013High Area-Efficient ESD Clamp Circuit With Equivalent RC-Based Detection Mechanism in a 65-nm CMOS ProcessYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O CircuitsYeh, Chih-Ting; Liang, Yung-Chih; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
4-三月-2019Luminescence material characterizations on laser-phosphor lighting techniquesYeh, Chih-Ting; Chou, Yen-, I; Yang, Kai-Shing; Wu, Shih-Kuo; Wang, Chi-Chuang; 機械工程學系; Department of Mechanical Engineering
1-三月-2012New Design of 2 x VDD-Tolerant Power-Rail ESD Clamp Circuit for Mixed-Voltage I/O Buffers in 65-nm CMOS TechnologyYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2009A New Three-Dimensional Capacitor Model for Accurate Simulation of Parasitic Capacitances in Nanoscale MOSFETsGuo, Jyh-Chyurn; Yeh, Chih-Ting; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019A NOVEL LIQUID-PACKAGING TECHNOLOGY FOR HIGHLY RELIABLE UV-LED ENCAPSULATIONZhang, Wen-Hua; Lin, Wei-Keng; Yeh, Chih-Ting; Chiang, Song-Bor; Jao, Chih-Sheng; 機械工程學系; Department of Mechanical Engineering
1-十一月-2017A novel oxidized composite braided wires wick structure applicable for ultra-thin flattened heat pipesYang, Kai-Shing; Tu, Cheng-Wei; Zhang, Wen-Hua; Yeh, Chih-Ting; Wang, Chi-Chuan; 機械工程學系; Department of Mechanical Engineering
1-三月-2014On the Design of Power-Rail ESD Clamp Circuits With Gate Leakage Consideration in Nanoscale CMOS TechnologyKer, Ming-Dou; Yeh, Chih-Ting; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2010Optimization on Layout Style of ESD Protection Diode for Radio-Frequency Front-End and High-Speed I/O Interface CircuitsYeh, Chih-Ting; Ker, Ming-Dou; Liang, Yung-Chih; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2013PMOS-based power-rail ESD clamp circuit with adjustable holding voltage controlled by ESD detection circuitYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2012Power-Rail ESD Clamp Circuit With Ultralow Standby Leakage Current and High Area Efficiency in Nanometer CMOS TechnologyYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2012Resistor-Less Design of Power-Rail ESD Clamp Circuit in Nanoscale CMOS TechnologyYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Resistor-Less Power-Rail ESD Clamp Circuit with Ultra-Low Leakage Current in 65nm CMOS ProcessYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2012Study of intrinsic characteristics of ESD protection diodes for high-speed I/O applicationsYeh, Chih-Ting; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005三端點與四端點的射頻金氧半電晶體模型參數萃取方法之建立及等效電路模擬之驗證葉致廷; Yeh, Chih-Ting; 郭治群; Jyh-Chyurn Guo; 電子研究所
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