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High Performance Metal-Gate/High-kappa GaN MOSFET With Good Reliability for Both Logic and Power Applications
(2016-09-01)
Yi, Shih-Han
;
Ruan, Dun-Bao
;
Di, Shaoyan
;
Liu, Xiaoyan
;
Wu, Yung Hsien
The gate-recessed GaN MOSFET on a Si substrate is demonstrated to achieve a record highest normalized transistor current (mu C-ox) of 335 mu A/V-2 (410 mA/mm at L-G = 5 mu m and only V-G = 4 V), I-ON/I-OFF of 9 orders of magnitude, small 79 mV/dec sub-threshold slope, a low oxide/GaN interface trap density of 1.2 x 10(10) eV(-1)/cm(2), a low on-resistance of 17.0 Omega-mm, a high breakdown voltage of 720-970 V, and excellent reliability of only 40 mV Delta V-T after 175 degrees C 1000 s stress at maximum drive current. Such excellent device integrities are due to the high-kappa gate dielectric and the high conduction band offset (Delta E-C) of SiO2/GaN. From the calculation results of self-consistent Schrodinger and Poisson equations, the good reliability of GaN MOSFET is related to the confined carrier density within the GaN channel, which is in sharp contrast to the strong wave-function penetration into the high-trap density AlGaN barrier in the AlGaN/GaN HEMT.
Improvement on performance and reliability of TaN/HfO2 LTPS-TFTs with fluorine implantation
(2008-03-01)
Ma, Ming-Wen
;
Chen, Chih-Yang
;
Su, Chun-Jung
;
Wu, Woei-Cherng
;
Yang, Tsung-Yu
In this paper, we demonstrate the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with TaN metal-gate and HfO2 gate dielectric to achieve high performance characteristics. A high performance LTPS-TFT with low threshold voltage 0.9 V, excellent subthreshold swing 0.15 V/decade and high I-on/I-min current ratio 1.9 x 10(6) are derived without any hydrogen treatment. In addition, we also introduce the fluorine implantation prior to the Si thin-film crystallization to passivate the defects in grain-boundaries of the channel film and HfO2/polysilicon interface. Significant improvements on subthreshold swing and I-min are observed. In addition, the transconductance degradation and threshold voltage instability due to hot carrier stress is also investigated, respectively. Finally, we derive a high reliability and performance LTPS-TFT with low threshold voltage similar to 1.38 V, ultra-low subthreshold swing 0.132 V/decade and high I-on/I-min current ratio 1.21 x 10(7), which is suitable for the application of system-on panel (SOP). (c) 2007 Elsevier Ltd. All rights reserved.
The effects of plasma treatment on the thermal stability of HfO(2) thin films
(2008-07-30)
Chang, Kow-Ming
;
Chen, Bwo-Ning
;
Huang, Shih-Ming
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The thermal stability of pure HfO(2) thin films is not high enough to withstand thermal processes, such as S/D activation or post-metal annealing, in modern industrial CMOS production. In addition, plasma nitridation technology has been employed for increasing the dielectric constant of silicon dioxide and preventing boron penetration. In this experiment, atomic layer deposition (ALD) technology was used to deposit HfO(2) thin films and inductively coupled plasma (ICP) technology was used to perform plasma nitridation process. The C-V and J-V characteristics of the nitrided samples were observed to estimate the effect of the nitridation process. According to this study, plasma nitridation process would be an effective method to improve the thermal stability of HfO(2) thin films. (C) 2008 Elsevier B. V. All rights reserved.
Schottky-barrier S/D MOSFETs with high-K gate dielectrics and metal-gate electrode
(2004-05-01)
Zhu, SY
;
Yu, HY
;
Whang, SJ
;
Chen, JH
;
Shen, C
This letter presents a low-temperature process to fabricate Schottky-barrier silicide source/drain transistors (SSDTs) with high-kappa gate dielectric and metal gate. For p-channel SSDTs (P-SSDT) using PtSi source/drain (S/D), excellent electrical performance of I-on/I-off similar to 10(7) - 10(8) and subthreshold slope of 66 mV/dec have been achieved. For n-channel SSDTs (N-SSDTs) using DySi2-x S/D, I-on/I-off can reach similar to 10(5) at V-ds of 0.2 V with two subthreshold slopes of 80 and 340 mV/dec. The low-temperature process relaxes the thermal budget of high-kappa dielectric and metal-gate materials to be used in the future generation CMOS technology.
A TaN-HfO2-Ge pMOSFET with novel SiH4 surface passivation
(2004-09-01)
Wu, N
;
Zhang, QC
;
Zhu, CX
;
Chan, DSH
;
Du, AY
In this letter, we demonstrate a novel surface passivation process for HfO2 Ge pMOSFETs using SiH4 surface annealing prior to HfO2 deposition. By using SiH4 passivation, a uniform amorphous interfacial layer is formed after device fabrication. Electrical results show that the HfO2 Ge MOSFET with Si-passivation exhibits less frequency dispersion, narrower gate leakage current distribution, and a similar to 140% higher peak mobility than that of the device with surface nitridation.
CoTiO3 high-kappa, dielectrics on HSG for DRAM applications
(2004-12-01)
Chao, TS
;
Ku, WM
;
Lin, HC
;
Landheer, D
;
Wang, YY
In this paper, a new high-kappa dielectric CoTiO3 has been investigated for the first time on hemispherical grained (HSG) poly-Si dynamic random access memories capacitors. Three types of HSG were prepared. We found that capacitors with maximum grain size and the highest density exhibit twice the capacitance of the others. The dielectric constant for CoTiO3 was estimated to be larger than 50. Leakage current measurements performed at temperatures as high as 100degreesC show that this dielectric is stable. The polarity dependence is found to be due to the different barrier heights with the nitride barrier. A leakage mechanism is proposed for this polarity dependence.
Germanium pMOSFETs with Schottky-barrier germanide S/D, high-kappa gate dielectric and metal gate
(2005-02-01)
Zhu, SY
;
Li, R
;
Lee, SJ
;
Li, MF
;
Du, AY
Schottky-barrier source/drain (S/D) germanium p-channel MOSFETs are demonstrated for the first time with HfAlO gate dielectric, HfN-TaN metal gate and self-aligned NiGe S/D. The drain drivability is improved over the silicon counterpart with PtSi S/D by as much as similar to5 times due to the lower hole Schottky barrier of the NiGe-Ge contact than that of PtSi-Si contact as well as the higher mobility of Ge channel than that of Si.
Metal-Gate/High-kappa/Ge nMOS at Small CET With Higher Mobility Than SiO2/Si at Wide Range Carrier Densities
(2013-02-01)
Liao, C. C.
;
Ku, T. C.
;
Lin, M. H.
;
Zeng, Lang
;
Kang, Jinfeng
High-performance TaN/TiLaO/La2O3/SiO2/(111)-Ge nMOSFETs show high mobility of 432 cm(2)/V . s at 10(13) cm(-2) carrier density (N-s), good 1.05 junction ideality factor, and small subthreshold swing of 101 mV/dec, at a small 1.1-nm capacitance-equivalent thickness (CET). This is the first report of higher mobility in the Ge nMOSFET than SiO2/Si universal mobility at wide medium-high N-s range and small CET of 1.1 nm, which is attributed to using the (111)-Ge substrate, 30-ns laser annealing, SiO2 interfacial layer, and YbGex/n-Ge contact.
High-performance poly-silicon TFTs incorporating LaAlO3 as the gate dielectric
(2005-06-01)
Hung, BF
;
Chiang, KC
;
Huang, CC
;
Chin, A
;
McAlister, SP
We have integrated a high-κ, LaAlO3 dielectric into low-temperature poly-Si (LTPS) thin-film transistors (TFTs). Good TFT performance was achieved-such as a high drive current, low threshold voltage and subthreshold slope, as well as an excellent on/off current ratio and high gate-dielectric breakdown field. This was achieved without hydrogen passivation or special crystallization steps. The good performance is related to the high gate capacitance density and small equivalent-oxide thickness provided by the high-κ dielectric.
Improved high-temperature leakage in high-density MIM capacitors by using a TiLaO dielectric and an Ir electrode
(2007-12-01)
Cheng, C. H.
;
Pan, H. C.
;
Yang, H. J.
;
Hsiao, C. N.
;
Chou, C. P.
We have fabricated high-kappa. TaN/Ir/TiLaO/TaN metal-insulator-metal capacitors. A low leakage current of 6.6 x 10(-7) A/cm(2) was obtained at 125 degrees C for 24-fF/mu m(2) density capacitors. The excellent device performance is due to the combined effects of the high-kappa TiLaO dielectric, a high work-function Ir electrode, and large conduction band offset.

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