完整後設資料紀錄
DC 欄位語言
dc.contributor.authorTsui, Bing-Yueen_US
dc.contributor.authorWang, Pei-Yuen_US
dc.contributor.authorChen, Ting-Yehen_US
dc.contributor.authorCheng, Jung-Chienen_US
dc.date.accessioned2014-12-08T15:12:58Z-
dc.date.available2014-12-08T15:12:58Z-
dc.date.issued2010-05-01en_US
dc.identifier.issn0026-2714en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.microrel.2010.01.040en_US
dc.identifier.urihttp://hdl.handle.net/11536/10011-
dc.description.abstractMulti-gate non-volatile memory (NVM) cell is a promising approach in the next generation. In this work, the performance of NVMs using nanocrystals (NCs) and nanowires (NWs) as charge trapping materials were evaluated by three-dimensional simulation. It is found that the NWs located at different positions have different charge injection speeds. And the NW density will strongly affect the charge injection efficiency. The NW at channel center can result in large memory window and acceptable channel controllability. Although the total charges injected into NWs is lower than that injected into NCs under the same programming condition, using NWs as charge trapping material exhibits larger memory window and better channel controllability. It is suggested that the NW is a better choice than NC to be charge storage material from the perspective of memory performance. (C) 2010 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleMulti-gate non-volatile memories with nanowires as charge storage materialen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1016/j.microrel.2010.01.040en_US
dc.identifier.journalMICROELECTRONICS RELIABILITYen_US
dc.citation.volume50en_US
dc.citation.issue5en_US
dc.citation.spage603en_US
dc.citation.epage606en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000278728700006-
顯示於類別:會議論文


文件中的檔案:

  1. 000278728700006.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。