Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 黃俊達 | en_US |
| dc.contributor.author | Huang Juinn-Dar | en_US |
| dc.date.accessioned | 2014-12-13T10:45:00Z | - |
| dc.date.available | 2014-12-13T10:45:00Z | - |
| dc.date.issued | 2010 | en_US |
| dc.identifier.govdoc | NSC99-2220-E009-008 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/100238 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2159362&docId=347541 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.subject | 分散式暫存器系統 | zh_TW |
| dc.subject | 連接模型 | zh_TW |
| dc.subject | 排程和資源配置 | zh_TW |
| dc.subject | 系統效能最佳化 | zh_TW |
| dc.subject | 多時脈週期通訊 | zh_TW |
| dc.subject | 延遲容忍系統 | zh_TW |
| dc.title | 後次微米時代新興電子設計自動化技術之研究---子計畫一：符合次世代晶片上通訊思維之具備幾何考量的系統架構合成技術(III) | zh_TW |
| dc.title | Geometry-Aware Architecture Synthesis for Next-Generation On-Chip Communication Paradigm (III) | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
| Appears in Collections: | Research Plans | |
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