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dc.contributor.authorLi, Yimingen_US
dc.contributor.authorHwang, Chih-Hongen_US
dc.date.accessioned2014-12-08T15:13:01Z-
dc.date.available2014-12-08T15:13:01Z-
dc.date.issued2007-12-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2007.908908en_US
dc.identifier.urihttp://hdl.handle.net/11536/10040-
dc.description.abstractIn this brief, electrical characteristics of 25-nm round-top-gate fin-typed field-effect transistors (FinFETs) on silicon wafers are numerically explored. With an ideal fin angle (i.e., theta = 90 degrees), the FinFETs with doped and undoped (for this case, the device has a metal gate) channels that was fabricated on silicon and silicon-on-insulator wafers are simulated and compared. With a 3-D quantum-correction-transport simulation, characteristic comparison shows that bulk FinFETs with the undoped channel possess promising electrical characteristics. By considering different short-channel effects, dependence of the device performance on the nonideal fin angle and fin height is further investigated. Optimal structure configuration for the round-top-gate bulk FinFETs is thus drawn to show the strategy of fabrication in sub-25-mn MOSFET devices.en_US
dc.language.isoen_USen_US
dc.subjectbulk fin-typed field-effect transistors (FinFETs)en_US
dc.subjectfin angleen_US
dc.subjectmanufacturabilityen_US
dc.subjectmetal gateen_US
dc.subjectmodeling and simulationen_US
dc.subjectround-top gateen_US
dc.titleEffect of fin angle on electrical characteristics of nanoscale round-top-gate bulk FinFETsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2007.908908en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume54en_US
dc.citation.issue12en_US
dc.citation.spage3426en_US
dc.citation.epage3429en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000251268300038-
dc.citation.woscount22-
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