標題: | Effects of width scaling and layout variation on dual damascene copper interconnect electromigration |
作者: | Lin, M. H. Chang, K. P. Su, K. C. Wang, Tahui 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-十二月-2007 |
摘要: | Electromigration versus line width in the 0.12-10 mu m range and the configuration of the via/line contact in dual damascene Cu has been investigated. There are two scenarios for width scaling impact on electromigration. One is the width < 1 mu m region, in which the MTF shows a weak width dependence, except for the via-limited condition. The other is the width > 1 mu m region, in which the MTF shows a strong width dependence. A theory was proposed to explain the observed behavior. For polycrystalline lines (width > 1 mu m), the dominant diffusion paths are a mixture of grain boundary and surface diffusion. The activation energy for the dominant grain boundary transport (width > 1 mu m) is approximately 0.2 eV higher than that of the dominant surface transport (width similar to 1 mu m). The derived activation energies for grain-boundary and surface diffusion are obtained from Cu drift velocity under electromigration stressing. The mechanisms governing the electromigration lifetime of interconnects leads to via interconnect design rules for maximizing lifetime being identified. (C) 2006 Elsevier Ltd. All rights reserved. |
URI: | http://dx.doi.org/10.1016/j.microrel.2006.10.004 http://hdl.handle.net/11536/10044 |
ISSN: | 0026-2714 |
DOI: | 10.1016/j.microrel.2006.10.004 |
期刊: | MICROELECTRONICS RELIABILITY |
Volume: | 47 |
Issue: | 12 |
起始頁: | 2100 |
結束頁: | 2108 |
顯示於類別: | 期刊論文 |