高性能混合訊號式發收機積體電路---總計畫

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	吳錦川	en_US
dc.date.accessioned	2014-12-13T10:45:56Z	-
dc.date.available	2014-12-13T10:45:56Z	-
dc.date.issued	2000	en_US
dc.identifier.govdoc	NSC89-2215-E009-067	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/100516	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=542650&docId=99732	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject	單晶片系統	zh_TW
dc.subject	收發器	zh_TW
dc.subject	混合訊號積體電路	zh_TW
dc.subject	低功率設計	zh_TW
dc.subject	高速積體電路	zh_TW
dc.subject	System-on-a-chip (SOC)	en_US
dc.subject	Transceiver	en_US
dc.subject	Mixed-signal integrated circuits	en_US
dc.subject	Low-power design	en_US
dc.subject	High-speed integrated circuit	en_US
dc.title	高性能混合訊號式發收機積體電路---總計畫	zh_TW
dc.title	High Performance Mixed-Signal Transceiver Integrated Circuit	en_US
dc.type	Plan	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
顯示於類別：	研究計畫