| 標題: | 使用60GHz之室內十億級位元傳輸率之無線基頻傳收機---子計畫三：針對通訊數位訊號處理器之電子系統層級驗証與合成環境(II) An ESL System Verification and Synthesis Environment for Communication DSP(II) |
| 作者: | 周景揚 JOU JING-YANG 國立交通大學電子工程學系及電子研究所 |
| 公開日期: | 2009 |
| 官方說明文件#: | NSC98-2220-E009-028 |
| URI: | http://hdl.handle.net/11536/101378 https://www.grb.gov.tw/search/planDetail?id=1897868&docId=314256 |
| Appears in Collections: | Research Plans |
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