標題: 異質整合Mixed-signal/MEMS CMOS無線射頻收發機設計研發---子計畫四:可重組式 Mixed-signal/MEMS .9G~10GHz射頻傳送端設計(I)
Reconfigurable Mixed-Signal /MEMS 9G~10GHz Radio Frequency Transmitter Design(I)
作者: 溫?岸
WEN KUEI-ANN
國立交通大學電子工程學系及電子研究所
關鍵字: 極座標發射器;切換式功率放大器;MEMS 濾波器;EDA 設計流程;多模多頻帶發射機;Polar Transmitter;Switching?Mode Power Amplifier;MEMS Filter;EDA design flow;Multi?Mode Transmitter
公開日期: 2009
摘要: 本子計畫目標為『Circuit/MEMS Co‐design EDA 設計平台的建立以及Multiband Multimode 發 射器(Transmitter)電路設計』 由於無線通訊的蓬勃發展,具有多模的個人通訊系統需求,使得開發適用於多頻帶, 並具有高線性度及高效率的發射器成為必然的趨勢。而欲設計出.9G‐10GHz 完整系統 晶片,異質整合是可行的解決方案之一,但為整合不同製程(如:MEMS,CMOS), 建立一個完整的EDA 整合設計平台是必需的。在本計畫中,會依下列流程完成包含系 統架構分析、電路模組設計,並建立於可異質整合的EDA 設計環境,藉以提供傳送系 統設計之整合。 依下列流程做RF CMOS MEMS 電路開發: (1) Multiband Multimode 傳送機系統架構評估 (2) Multiband Multimode 射頻積體電路晶片及MEMS 元件設計 本計畫全程計畫為2 年: 第一年會針對.9‐10GHz 傳送機系統設計所需建立之設計要項進行技術開發及環境的 建立,包括: (1) Circuit/MEMS Co‐design EDA 設計環境的建立 (2) Multiband Multimode 傳送機系統架構分析 (3) Multiband Multimode 傳送機系統積體電路晶片設計 由於傳送機系統中,主要電路功率放大器的特性會影響系統性能甚巨,故於第一年 計畫中,故會特別針對應用於多模多頻帶系統中的功率放大器,其非線性特性作一 研究,並提出之解決方案。 第二年會針對系統中可應用之MEMS 被動元件(例如:濾波器),作一研究及設計, 並利用所建立之EDA 設計環境,與電路作一整合。 設計規格為: 1. 可適用於GSM,DCS,PCS,GPS,WCDMA,Bluetooth,802.11a,WiMAX,Satellite Com.,UWB。之 Multi‐Band Multi‐Mode Wireless Transmitter 設計。 System Frequency Band Power GSM900 890‐915MHz 935‐960MHz 1‐2W DCS1800 1710‐1785MHz 1805‐1880MHz 125mW GPS 1575/1227MHz 100mW PCS1900 1930‐1990MHz 125mW WCDMA 1920‐1980MHz 2110‐2170MHz 125‐250mW Bluetooth 2400‐2483.5MHz 1/2.5/100mW 802.11a 5150‐5825MHz 40/200/800mW WiMAX 2‐11GHz ~1W UWB 3‐10.6GHz 100mW‐250mW 2. 極座標發射機架構及高線性度、高效率切換式功率放大器設計:
With development of communication market, more and more communication devices of different applications have been produced. Therefore, in transmission, a transmitter that can cover multi frequency band is also expected. To realize a .9‐10GHz transmitter chipset, heterogeneous technology is a feasible solution. However, to integrate different devices (ex: MEMS, CMOS), it has to build a EDA simulation platform. In this project, the design flow includes system link budget analysis and architecture design. In addition, EDA simulation environment will be constructed for integration. For system integration, the design targets are as follows: 1. Transmitter architecture analysis 2. Transmitter system circuit design and MEMS component development Design target for the first year will be set on the technical development and simulation platform construction. It includes: (1) Simulation platform construction (2) Transmitter system architecture analysis (3) Transmitter system integration In transmission, power amplifier is the key circuit in degradations of system performance. Therefore, the nonlinear effect of power amplifier will be research and the solution will be proposed. Design target for the second year will be set on MEMS component design for system integration. It will primarily focus on MEMS filter design and integrate with system circuits.
官方說明文件#: NSC98-2220-E009-065
URI: http://hdl.handle.net/11536/101771
https://www.grb.gov.tw/search/planDetail?id=1910441&docId=316830
顯示於類別:研究計畫