金屬-鐵電-絕緣-半導體場效應電晶體之開發研究

Abstract

本計畫目標為開發整合良好的高介電係數閘極絕緣層在金屬-鐵電-絕緣-半導體電 晶體的應用。本計畫將使用溶膠凝膠旋塗法塗佈鐵電材料，及物理氣相沈積來開發高 介電係數閘極絕緣層，使用具有高能隙的二氧化鉿或三氧化二鑭為基礎，摻雜不同成 分與比例的鑭系元素氧化物，預期改善其能帶、電子親和力、拉高結晶溫度、減少基 板注入低漏電流，使鐵電記憶體能整合入互補式金屬-氧化物-半導體的製程中。此外且 具有高介電係數的閘極絕緣層，可被預期降低金屬-鐵電-絕緣-半導體電晶體的操作電 壓，減緩去極化電場效應，在鐵電層中儲存更多的極化電荷，來延長鐵電記憶體的保 存時間，提高做為鐵電非揮發記憶體的可行性。

The aim of this project is developing the high-k dielectric suitable for metalferroelectric- insulator-semiconductor field effect transistor (MFIS-FET). In this work, we use sol-gel method to spin the ferroelectric material and physics vapor deposition (PVD) system to develop the high-k dielectric materials. We use hafnium oxide (HfO2) or lanthanum oxide (La2O3) as the based material and incorporate with various composition and percentage of metal oxides in lanthanum system. We expect that such mixed high-k insulator with lanthanum oxide could improve the physical characteristics, including energy band gap, crystalline temperature, or substrate leakage current injection so that the ferroelectric memory could be integrated into the complementary-metal-oxide-semiconductor (CMOS) process. Besides, using the high-k insulator could lower the operation voltage of MFIS-FET, alleviate the depolarization field effect, and increase more polarization charges to prolong the retention time of the MFIS-FET. Therefore, the excellent performance of MFIS-FET is achieved for clearly useful for non-volatile memory requirement.