完整後設資料紀錄
DC 欄位語言
dc.contributor.author游逸平en_US
dc.contributor.authorYou Yi-Pingen_US
dc.date.accessioned2014-12-13T10:50:32Z-
dc.date.available2014-12-13T10:50:32Z-
dc.date.issued2008en_US
dc.identifier.govdocNSC97-2218-E009-043-MY3zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/102181-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=1719936&docId=295363en_US
dc.description.abstract在現代半導體技術中,漏電功率在的整體功率中所占的比例愈來愈高,原因是電晶 體的大小不斷縮小而速度卻不斷提升。最近,已有研究提出硬體搭配編譯器技術來降低 漏電的消耗,其作法是透過編譯器分析程式並在程式中適當地安插指令以開啟或關閉特 定元件,然而,在過去研究中所提出的方法與架構僅適用於單一執行緒的程式,無法針 對多執行緒程式進行漏電管理,理由是執行緒的執行順序在程式執行時才可決定,在編 譯時期難以得知執行時期欲進行電源匣控管理元件的使用狀況,如果直接將過去研究中 提出的方法應用在多執行緒程式上,則會產生邏輯上的矛盾:程式中某一個執行緒正準 備要使用某個元件時,這個元件已經被另一個執行緒關閉。因此我們需要新的硬體及軟 體架構來解決這樣的問題。我們之所以會對多執行緒程式在耗能管理上的議題感到興 趣,主因是多執行緒程式設計在現代的程式設計中所扮演的角色愈來愈重要,因為多執 行緒可以讓程式充分地使用CPU 時間,也因此讓程式可以被寫得很有效率,並且,目 前正興起的多核心架構也需要多執行程式設計來提高它們的效能;況且,多執行緒是處 理以事件驅動軟體的最佳選擇,例如現今許多的嵌入式環境、分散式環境、網路環境等。 有鑑於此,在本計畫中我們將以過去的研究為基礎,並針對在單核心與多核心架構處理 器架構下的多執行緒程式提出相關的硬體及編譯器技術以降低處理器的漏電耗能,同 時,我們也嘗試將電源管理的範圍擴大到編譯器與作業系統間的協同合作,期望能為多 執行緒程式提供一套完整的漏電耗能管理方案,以因應低耗能、高效能產品應用的需求。 本計畫主持人在低耗能設計的領域有多年的研究經驗,特別是在低功率編譯器設計 方面的研究,除了發表許多論文在知名會議(LCPC、LCTES、EMSOFT 等)及期刊論文 (ACM Transactions on Design Automation of Electronic Systems)上-亦即前段敘述中的過 去研究,其博士論文更獲得中華民國資訊學會最佳博士論文優等獎的殊榮。此外,計畫 主持人游逸平教授在其攻讀博士期間,亦因參與經濟部學界科專之「前瞻高效能低耗能 之雙處理器系統技術研發計畫」表現傑出,對該計畫貢獻良多,獲頒傑出學生研究獎。 我們認為這個研究除了可以幫助我們在低耗能系統軟體開發環境技術方面取得關鍵性 突破外,也可在其相關技術領域中佔得先機。我們將會積極地研究相關的多執行緒編譯 器最佳化技術及低耗能環境技術,學生和研究者將會獲得非常高階技術的實際經驗。zh_TW
dc.description.abstractLeakage power constitutes an increasing fraction of the total power consumption in modern semiconductor technologies due to the continuing size reductions and increasing speeds of transistors. Recent studies have attempted to reduce leakage power using integrated architecture and compiler power-gating mechanisms. This approach involves compilers inserting instructions into programs to shut down and wake up components as appropriate. However, the approaches proposed in the early studies are only applicable to single-threaded programs. When it comes to multithreaded programs, there should be an alternative hardware and/or software mechanism(s) to deal with the additional concern of the interaction among threads. The uncertainty of the execution sequence of threads makes it difficult for compilers to analyze the utilization status of the power-gating candidates of a multithreaded program. Simply applying power-gating management for multithreaded programs with the previous work will most likely break the logic that a unit must be in the active state, i.e., powered on, before being used for processing since the unit might be powered off by a thread while other concurrent threads are still using or about to use it. The reason why we are concerning about the energy management for multithreaded programs is that multithreading is becoming an increasingly important part of modern programming. One reason for this is that multithreading enables a program to make the best use of available CPU cycles, thus allowing very efficient programs to be written. Moreover, the rising multi-core architectures need multithreaded programming to boost their performance. Another reason is that multithreading is a natural choice for handling event-driven code, which is so common in today's embedded, highly distributed, and networked environments. In view of this, in this project we are going to propose compiler techniques based on the previous work on power-gating control and multithreading analyses with hardware supports to manage leakage energy consumption for multithreaded programs on both single-core and multi-core processors. Also, we will enlarge the management to the collaboration between compilers and operating systems. We expect to provide a comprehensive solution for leakage energy management of multithreaded programs in order to cope with the demand of low-power and high-performance applications. The PI of the project, Prof. Yi-Ping You, had research and development experiences in the field of low-power design, especially in power-aware compilation, for many years. He had published many papers on some major conferences (such as LCPC, LCTES, and EMSOFT) and journals (ACM Transactions on Design Automation of Electronic Systems) — which are the research work mentioned in the previous paragraph. He also received Distinguished Ph.D. Dissertation Award from Institute of Information and Computing Machinery, 2007, Moreover, when he was a Ph.D. student, he received the Outstanding Student Research Award due to excellent performance and numerous contributions in the project of Technology Research for Advanced High-Performance and Low-Power Dual Processor Systems in 2006. We think that this research and development work can lead to the establishment of the key compiler technologies in the low power and multithreading areas. We will also actively research into optimization issues related to low power issues. Students and researchers will learn real experiences with a very critical software technology.en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title多執行緒程式之漏電耗能管理方法zh_TW
dc.titleLeakage Energy Management for Multithreaded Programsen_US
dc.typePlanen_US
dc.contributor.department國立交通大學資訊工程學系(所)zh_TW
顯示於類別:研究計畫


文件中的檔案:

  1. 972218E009043MY3(第1年).PDF
  2. 972218E009043MY3(第2年).PDF
  3. 972218E009043MY3(第3年).PDF

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。