完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Y. W. | en_US |
dc.contributor.author | Chiang, T. H. | en_US |
dc.contributor.author | Chen, Chih | en_US |
dc.date.accessioned | 2014-12-08T15:13:20Z | - |
dc.date.available | 2014-12-08T15:13:20Z | - |
dc.date.issued | 2007-09-24 | en_US |
dc.identifier.issn | 0003-6951 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1063/1.2790376 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/10317 | - |
dc.description.abstract | Three-dimensional modeling is employed to simulate various Kelvin structures for detecting the change in bump resistance due to void formation and propagation during electromigration in flip-chip solder joints. It is found that the Kelvin structures can sense the highest voltage drop when its voltage probes are placed at the current entrance into the bump on the chip side, and it is thus the most sensitive design to monitor void formation and propagation. When the bump resistance increases 20% of its initial value, the depletion percentage of contact opening ranges from 21.0% to 65.0%, depending on the position of the probes. (c) 2007 American Institute of Physics. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Effect of void propagation on bump resistance due to electromigration in flip-chip solder joints using Kelvin structure | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1063/1.2790376 | en_US |
dc.identifier.journal | APPLIED PHYSICS LETTERS | en_US |
dc.citation.volume | 91 | en_US |
dc.citation.issue | 13 | en_US |
dc.citation.epage | en_US | |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.identifier.wosnumber | WOS:000249787000047 | - |
dc.citation.woscount | 13 | - |
顯示於類別: | 期刊論文 |