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dc.contributor.author陳冠能en_US
dc.contributor.author李世偉en_US
dc.date.accessioned2014-12-16T06:11:58Z-
dc.date.available2014-12-16T06:11:58Z-
dc.date.issued2013-03-16en_US
dc.identifier.govdocH01L025/04zh_TW
dc.identifier.govdocH01L023/52zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/103304-
dc.description.abstract一種三維積體電路,其包括一第一晶圓及一第二晶圓。第一晶圓包括一第一導電圖樣。第二晶圓包括一第二導電圖樣,且電性連接第一導電圖樣。其中第一晶圓與第二晶圓的位移量係根據第一導電圖樣及第二導電圖樣的電阻値來決定。zh_TW
dc.language.isozh_TWen_US
dc.title三維積體電路zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumber201312724zh_TW
Appears in Collections:Patents


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