Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 陳冠能 | en_US |
dc.contributor.author | 李世偉 | en_US |
dc.date.accessioned | 2014-12-16T06:11:58Z | - |
dc.date.available | 2014-12-16T06:11:58Z | - |
dc.date.issued | 2013-03-16 | en_US |
dc.identifier.govdoc | H01L025/04 | zh_TW |
dc.identifier.govdoc | H01L023/52 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/103304 | - |
dc.description.abstract | 一種三維積體電路,其包括一第一晶圓及一第二晶圓。第一晶圓包括一第一導電圖樣。第二晶圓包括一第二導電圖樣,且電性連接第一導電圖樣。其中第一晶圓與第二晶圓的位移量係根據第一導電圖樣及第二導電圖樣的電阻値來決定。 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 三維積體電路 | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | TWN | zh_TW |
dc.citation.patentnumber | 201312724 | zh_TW |
Appears in Collections: | Patents |
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