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dc.contributor.authorHo Ying-Chiehen_US
dc.contributor.authorYang Yu-Shengen_US
dc.contributor.authorSu Chau-Chinen_US
dc.date.accessioned2014-12-16T06:13:50Z-
dc.date.available2014-12-16T06:13:50Z-
dc.date.issued2014-06-17en_US
dc.identifier.govdocH03K005/15zh_TW
dc.identifier.govdocH03K005/00zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104369-
dc.description.abstractA ring oscillator includes (2N+1) inverting delay circuit cells, and each delay circuit cell has an input port and an output port, where N is an integer larger than zero. Each of these (2N+1) inverting delay circuit cells receives a control voltage, and all of the (2N+1) inverting delay circuit cells are electrically connected with each other in series. Furthermore, the input port of one of the (2N+1) inverting delay circuit cells is electrically connected with the output port of an adjacent delay circuit cell of the (2N+1) inverting delay circuit cells.zh_TW
dc.language.isozh_TWen_US
dc.titleRing oscillatorzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08754716zh_TW
Appears in Collections:Patents


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