Method for fabricating nanometer gate in semiconductor device using thermally reflowed resist technology

Abstract

The invention relates to a method for fabricating nanometer gate semiconductor device using thermally reflowed photoresist technology, comprising steps of (i) spin-coating two layers of photoresists on a substrate, where a bottom layer of photoresist is a polymeric photoresist having a lower sensitivity and a higher resolution, and a top layer of photoresist, is another polymeric photoresist having a higher sensitivity and a lower resolution, with respect to the electron beam; (ii) heating the photoresists for curing by way of using a hotplate; (iii) using photolithography in an electron beam direct writing manner to expose a pattern on the photoresists for forming a gate; (iv) using a developer and an etchant for developing and etching to form a recess on the gate; (v) plating a metallic layer on the recess of the gate using an electron gun evaporation technique; and (vi) removing the photoresists to obtain the gate, characterized in that after the etching of the recess of the gate, the photoresists are reflowed by using a hot plate heating manner within a predetermined period of time and temperature, such that the recess of the gate is formed with a nanometer-sized width.