標題: | CONTROL CIRCUIT OF SRAM AND OPERATING METHOD THEREOF |
作者: | CHUANG Ching-Te LIEN Nan-Chun LIAO Wei-Nan CHU Li-Wei CHANG Chi-Shin TU Ming-Hsien |
公開日期: | 6-三月-2014 |
摘要: | A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors. The word-line driver is to activate the word-line of the memory array for cell storage data access. The boost circuit is to provide the higher voltage source for the word-line driver and a first operating voltage for boosting the first operating voltage to a second operating voltage. The voltage level detecting circuit is detecting if the first operation voltage needed boosted with boost-operation and a detecting-trigger signal and controls the operating of the boost circuit based on the detecting-trigger signal, the first operating voltage and a predetermined voltage. |
官方說明文件#: | G11C011/412 |
URI: | http://hdl.handle.net/11536/104945 |
專利國: | USA |
專利號碼: | 20140063918 |
顯示於類別: | 專利資料 |