METHOD FOR ADJUSTING A LAYOUT OF AN INTEGRATED CIRCUIT

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DC Field	Value	Language
dc.contributor.author	CHAO Mango C.-T.	en_US
dc.contributor.author	CHEN Kuo-An	en_US
dc.contributor.author	CHANG Tsung-Wei	en_US
dc.date.accessioned	2014-12-16T06:14:50Z	-
dc.date.available	2014-12-16T06:14:50Z	-
dc.date.issued	2014-02-20	en_US
dc.identifier.govdoc	G06F017/50	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/104950	-
dc.description.abstract	A method for adjusting a layout of an integrated circuit includes a first layer, a second layer, a target metal line, and a first non-target metal line. The integrated circuit is configured for a focused ion beam (FIB) detection to the target metal line. The method includes the steps of: disposing the first non-target metal line on the first layer; disposing the target metal line on the second layer; and adjusting one of the target metal line and the first non-target metal line such that the target metal line can be detected by the FIB detection.	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	METHOD FOR ADJUSTING A LAYOUT OF AN INTEGRATED CIRCUIT	zh_TW
dc.type	Patents	en_US
dc.citation.patentcountry	USA	zh_TW
dc.citation.patentnumber	20140053122	zh_TW
Appears in Collections:	Patents

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