標題: | VERTICAL TRANSISTOR AND A METHOD OF FABRICATING THE SAME |
作者: | Meng Hsin-Fei Zan Hsiao-Wen Chao Yu-Chiang |
公開日期: | 24-十一月-2011 |
摘要: | A vertical transistor and a method of fabricating the vertical transistor are provided. The vertical transistor has a substrate, a first electrode formed on the substrate, a first insulation layer formed on the first electrode, with a portion of the first electrode exposed from the first insulation layer and having a thickness greater than 50 nm and no more than 300 nm, a grid electrode formed on the first insulation layer, a semiconductor layer formed on the first electrode, and a second electrode formed on the semiconductor layer. |
官方說明文件#: | H01L029/78 H01L021/336 |
URI: | http://hdl.handle.net/11536/105244 |
專利國: | USA |
專利號碼: | 20110284949 |
顯示於類別: | 專利資料 |