Method for carry estimation of reduced-width multipliers

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DC 欄位	值	語言
dc.contributor.author	Liao Yen-Chin	en_US
dc.contributor.author	Chang Hsie-Chia	en_US
dc.date.accessioned	2014-12-16T06:15:24Z	-
dc.date.available	2014-12-16T06:15:24Z	-
dc.date.issued	2011-07-28	en_US
dc.identifier.govdoc	G06F007/52	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/105278	-
dc.description.abstract	A low-error reduced-width multiplier is provided by the present invention. The multiplier can dynamically compensate the truncation error. The compensation value is derived by the dependencies among the multiplier partial products, and thus, can be analyzed according to the multiplication type and the multiplier input statistics.	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	Method for carry estimation of reduced-width multipliers	zh_TW
dc.type	Patents	en_US
dc.citation.patentcountry	USA	zh_TW
dc.citation.patentnumber	20110185000	zh_TW
顯示於類別：	專利資料

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