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dc.contributor.authorLee, Chen-yien_US
dc.contributor.authorChung, Ching-cheen_US
dc.date.accessioned2014-12-16T06:15:38Z-
dc.date.available2014-12-16T06:15:38Z-
dc.date.issued2010-04-15en_US
dc.identifier.govdocH03L007/099zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/105423-
dc.description.abstractA digital loop filter installed in an all-digital phase-locked loop (PLL) receives a digitally controlled oscillator (DCO) control code transmitted from a PLL controller in the all-digital PLL, and calculate an average value, such that the PLL controller can produce another DCO control code by the average value for controlling and adjusting an output signal of a digitally controlled oscillator (DCO) in the neighborhood of the average value to maintain compensating a phase/frequency difference with an input signal, so as to minimize the jitter effect of the input signal on the all-digital PLL, reduce the jitter effect of the output signal, and keep tracking and locking the frequency and the phase of the input signal.zh_TW
dc.language.isozh_TWen_US
dc.titleDigital Loop Filter for All-Digital Phase-Locked Loop Designzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20100090769zh_TW
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