Title: | DIGITAL FAST-LOCKING FREQUENCY SYNTHESIZER |
Authors: | CHEN, WEI-ZEN YANG, SONG-YU |
Issue Date: | 18-Feb-2010 |
Abstract: | A digital PLL frequency synthesizer characterized by fast-locking and low-jitters is presented. The PLL comprises a phase detector, a controllable oscillator, a loop filter having an automatically-adjusted loop gain, a feedback phase integration circuit, and a reference phase integration circuit. Fast-locking is achieved by dynamically adjusting forward-path gain and integral-path gain according to the output of the phase detector and the output of the integral-path during phase tracking. A skew-compensated counter circuit is proposed, which incorporates an asynchronous counter, a data register and a sample phase generator and features high-speed and low-power operation. |
Gov't Doc #: | H03L007/085 |
URI: | http://hdl.handle.net/11536/105444 |
Patent Country: | USA |
Patent Number: | 20100039183 |
Appears in Collections: | Patents |
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