標題: | Pre-charge sample-and-hold circuit |
作者: | Wu, Jieh-Tsorng Lee, Zwei-Mei Wang, Cheng-Yeh |
公開日期: | 31-七月-2008 |
摘要: | A precharge sample-and-hold circuit is formed by coupling a buffer with an input port and making use of a switch to conduct the circuit between the buffer and a total load capacitor for precharging according the state of a sample-and-hold circuit. When the sample-and-hold circuit is in the sample mode, it precharges the total load capacitor. When the sample-and-hold circuit is in the hold mode, the influence to the sampled signal is further reduced due to the precharging. The requirements of swing rate, output voltage swing, gain-bandwidth product for the opamps can therefore be reduced, hence being applicable to the realization of the design of advanced fabrication technologies of low supply voltages. |
官方說明文件#: | G11C027/02 |
URI: | http://hdl.handle.net/11536/105581 |
專利國: | USA |
專利號碼: | 20080180136 |
顯示於類別: | 專利資料 |