標題: Architecture of a n-type metal-oxide-semiconductor transistor with a compressive strained silicon-germanium channel fabricated on a silicon (110) substrate
作者: Luo, Guangli
Chien, Chao-Hsin
Yang, Tsung-Hsi
Chang, Chun-Yen
公開日期: 6-Sep-2007
摘要: The present invention discloses an architecture of a NMOS transistor with a compressive strained Si—Ge channel fabricated on a silicon (110) substrate, which comprises: a p-silicon (110) substrate, two n+ ion-implanted regions functioning as the source and the drain respectively, a compressive strained Si—Ge channel layer, and a gate structure. The compressive strained Si—Ge channel layer is grown on the p-silicon (110) substrate to reduce the electron conductivity effective mass in the [1_l -10] crystallographic direction and to promote the electron mobility in the [1-10] crystallographic direction. Thus, the present invention can improve the electron mobility of a NMOS transistor via the channels fabricated on the silicon (110) substrate. Further, the NMOS transistor of the present invention can combine with a high-speed PMOS transistor on a silicon (110) substrate to form a high-performance CMOS transistor on the same silicon (110) substrate.
官方說明文件#: H01L029/76
URI: http://hdl.handle.net/11536/105639
專利國: USA
專利號碼: 20070205444
Appears in Collections:Patents


Files in This Item:

  1. 20070205444.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.